Invention Grant
- Patent Title: Method for manufacturing semiconductor structure same
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Application No.: US17411678Application Date: 2021-08-25
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Publication No.: US11721610B2Publication Date: 2023-08-08
- Inventor: Liang-Pin Chou
- Applicant: NANYA TECHNOLOGY CORPORATION
- Applicant Address: TW New Taipei
- Assignee: NANYA TECHNOLOGY CORPORATION
- Current Assignee: NANYA TECHNOLOGY CORPORATION
- Current Assignee Address: TW New Taipei
- Agency: Muncy, Geissler, Olds & Lowe, P.C.
- The original application number of the division: US16440112 2019.06.13
- Main IPC: H01L23/48
- IPC: H01L23/48 ; H01L23/522 ; H01L21/768 ; H01L23/532

Abstract:
The present disclosure provides a method for manufacturing a semiconductor structure. The method includes providing an underlying semiconductor layer; depositing an insulation layer over the underlying semiconductor layer; forming a first through semiconductor via extending continuously through the insulation layer; forming a second through semiconductor via extending continuously through the insulation layer; etching a portion of the insulation layer to expose a first upper end of the first through semiconductor via above the insulation layer and a second upper end of the second through semiconductor via above the insulation layer; and forming an upper conductive connecting portion laterally connected to a first upper lateral surface of the first upper end and a second upper lateral surface of the second upper end by a self-aligned deposition process.
Public/Granted literature
- US20210384108A1 METHOD FOR MANUFACTURING SEMICONDUCTOR STRUCTURE SAME Public/Granted day:2021-12-09
Information query
IPC分类: