Invention Grant
- Patent Title: Communication between integrated circuit (IC) dies in wafer-level fan-out package
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Application No.: US17037363Application Date: 2020-09-29
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Publication No.: US11721651B2Publication Date: 2023-08-08
- Inventor: Chi Fung Poon , Asma Laraba , Parag Upadhyaya
- Applicant: XILINX, INC.
- Applicant Address: US CA San Jose
- Assignee: XILINX, INC.
- Current Assignee: XILINX, INC.
- Current Assignee Address: US CA San Jose
- Agency: Patterson + Sheridan, LLP
- Main IPC: H01L23/66
- IPC: H01L23/66 ; H01L23/538 ; H01L25/16

Abstract:
Examples described herein generally relate to communication between integrated circuit (IC) dies in a wafer-level fan-out package. In an example, an electronic device includes a wafer-level fan-out package. The wafer-level fan-out package includes a first integrated circuit (IC) die, a second IC die, and a redistribution structure. The first IC die includes a transmitter circuit. The second IC die includes a receiver circuit. The redistribution structure includes physical channels electrically connected to and between the transmitter circuit and the receiver circuit. The transmitter circuit is configured to transmit multiple single-ended data signals and a differential clock signal through the physical channels to the receiver circuit. The receiver circuit is configured to capture data from the multiple single-ended data signals using a first single-ended clock signal based on the differential clock signal.
Public/Granted literature
- US20220102293A1 COMMUNICATION BETWEEN INTEGRATED CIRCUIT (IC) DIES IN WAFER-LEVEL FAN-OUT PACKAGE Public/Granted day:2022-03-31
Information query
IPC分类: