Invention Grant
- Patent Title: Magneto-resistive random-access memory (MRAM) devices with self-aligned top electrode via
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Application No.: US17231419Application Date: 2021-04-15
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Publication No.: US11723282B2Publication Date: 2023-08-08
- Inventor: Wei-Hao Liao , Hsi-Wen Tien , Chih-Wei Lu , Pin-Ren Dai , Chung-Ju Lee
- Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
- Applicant Address: TW Hsinchu
- Assignee: Taiwan Semiconductor Manufacuturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacuturing Company, Ltd.
- Current Assignee Address: TW Hsinchu
- Agency: Birch, Stewart, Kolasch & Birch, LLP
- The original application number of the division: US16440011 2019.06.13
- Main IPC: H10N50/01
- IPC: H10N50/01 ; H01F41/34 ; H01F10/32 ; H10B61/00 ; H10N50/80

Abstract:
An MRAM device includes a bottom electrode over a substrate, a magnetic tunnel junction (MTJ) structure on the bottom electrode, and a top electrode on the MTJ structure. The MRAM device also includes spacers on sidewalls of the top electrode and the MTJ structure, and a first dielectric layer surrounding the spacers. The MRAM device further includes a patterned etch stop layer on the first dielectric layer and the spacers. In addition, the MRAM device includes a second dielectric layer on the patterned etch stop layer, and a top electrode via embedded in the second dielectric layer and in contact with the top electrode and the patterned etch stop layer.
Public/Granted literature
- US20210257546A1 MAGNETO-RESISTIVE RANDOM-ACCESS MEMORY (MRAM) DEVICES WITH SELF-ALIGNED TOP ELECTRODE VIA Public/Granted day:2021-08-19
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