In an embodiment a control circuit includes a low-power detection circuit configured to generate a control signal, wherein the low-power detection circuit is, when a driver circuit operates in a high-power mode, configured to determine a first temporal value indicative of a duration of a second phase (T2), detect whether a logic level of a zero current signal changes from a first logic level to a second logic level during the second phase (T2), in response to detecting that the logic level of the zero current signal changes from the first logic level to the second logic level, determine a second temporal value indicative of a time (TZC) elapsed between an instant (t3) when the logic level of the zero current signal changes from the first logic level to the second logic level during the second phase (T2) and the instant (t1) when the second phase (T2) ends, determine whether a ratio between the second temporal value (TZC) and the first temporal value (T2) is greater than a given number threshold value (TH), in response to determining that the ratio between the second temporal value (TZC) and the first temporal value (T2) is smaller than the given threshold value (TH), set a comparison signal to the first logic level indicating that the high-power mode is to be maintained, in response to determining that the ratio between the second temporal value (TZC) and the first temporal value (T2) is greater than the given threshold value (TH), set the comparison signal to the second logic level indicating that a low-power mode is to be activated and set the logic level of the control signal as a function of the comparison signal.