Invention Grant
- Patent Title: Semiconductor package and manufacturing process thereof
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Application No.: US17725527Application Date: 2022-04-20
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Publication No.: US11742276B2Publication Date: 2023-08-29
- Inventor: Li-Huan Chu , Hsu-Hsien Chen , Liang-Chen Lin , Tsung-Yang Hsieh , Hsin-Hsien Lee , Kuen-Hong Tsai
- Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
- Applicant Address: TW Hsinchu
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsinchu
- Agency: JCIPRNET
- Main IPC: H01L23/498
- IPC: H01L23/498 ; H01L23/538 ; H01L25/065 ; H01L21/76 ; H01L29/04 ; H01L21/02 ; H01L25/00 ; H01L21/56 ; H01L21/768 ; H01L23/00 ; H01L21/60
Abstract:
A package manufacturing process and semiconductor packages are provided. An interposer having a crystal structure is provided. A first die and a second die are bonded on the interposer. The second die is positioned to be spaced apart from the first die with a gap extending direction that is perpendicular to a shortest distance of the gap, and the gap extending direction is not parallel with a crystallographic orientation of the crystal structure of the interposer. A molding compound is formed over the interposer covering the first and second dies. The molding compound and the interposer are cut into packages.
Public/Granted literature
- US20220246511A1 SEMICONDUCTOR PACKAGE AND MANUFACTURING PROCESS THEREOF Public/Granted day:2022-08-04
Information query
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