Invention Grant
- Patent Title: Wiring substrate, electronic device, and electronic module
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Application No.: US17417413Application Date: 2019-10-31
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Publication No.: US11742278B2Publication Date: 2023-08-29
- Inventor: Kazushi Nakamura , Hidehisa Umino
- Applicant: KYOCERA Corporation
- Applicant Address: JP Kyoto
- Assignee: KYOCERA Corporation
- Current Assignee: KYOCERA Corporation
- Current Assignee Address: JP Kyoto
- Agency: Volpe Koenig
- Priority: JP 18242957 2018.12.26
- International Application: PCT/JP2019/042862 2019.10.31
- International Announcement: WO2020/137152A 2020.07.02
- Date entered country: 2021-06-23
- Main IPC: H05K1/11
- IPC: H05K1/11 ; H01L23/498 ; H01L23/13 ; H01L23/00 ; H05K1/02 ; H05K1/18

Abstract:
A wiring substrate includes: an insulating substrate being shaped in a quadrangle in a plan view, including a mounting portion where an electronic component is mounted on a side of a principal surface of the insulating substrate, and having a recess on a side surface thereof; an inner surface electrode which is located on an inner surface of the recess; a via conductor which is located on a corner side of the insulating substrate in a perspective plan view and has both ends located in a thickness direction of the insulating substrate; and a wiring conductor, on the side of the principal surface of the insulating substrate, connecting the mounting portion, the inner surface electrode, and the via conductor, wherein, in a perspective plan view, the wiring conductor has a wiring conductor absent region which surrounds a region located between the mounting portion and the via conductor.
Public/Granted literature
- US20220077049A1 WIRING SUBSTRATE, ELECTRONIC DEVICE, AND ELECTRONIC MODULE Public/Granted day:2022-03-10
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