Invention Grant
- Patent Title: Interface of integrated circuit die and method for arranging interface thereof
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Application No.: US17134534Application Date: 2020-12-28
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Publication No.: US11742295B2Publication Date: 2023-08-29
- Inventor: Ting-Hao Wang , Ting-Chin Cho , Igor Elkanovich , Amnon Parnass , Chia-Hsiang Chang , Tsai-Ming Yang , Yen-Chung T. Chen , Ting-Hsu Chien , Yuan-Hung Lin , Chao-Ching Huang , Li-Ya Tseng , Pei Yu , Jia-Liang Chen , Yen-Wei Chen , Chung-Kai Wang , Chun-Hsu Chen , Yu-Ju Chang , Li-Hua Lin , Zanyu Yang
- Applicant: Global Unichip Corporation , Taiwan Semiconductor Manufacturing Company, Ltd.
- Applicant Address: TW Hsinchu
- Assignee: Global Unichip Corporation,Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Global Unichip Corporation,Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsinchu; TW Hsinchu
- Agency: JCIPRNET
- Main IPC: H01L23/538
- IPC: H01L23/538 ; H01L23/00 ; H01L25/065 ; H01L23/498

Abstract:
An interface of integrated circuit (IC) die includes a plurality of the contact elements formed as a contact element pattern corresponding to a parallel bus. The contact elements are arranged in an array of rows and columns and divided into a transmitting group and a receiving group. The contact elements of the transmitting group have a first contact element sequence and the contact elements of the receiving group have a second contact element sequence, the first contact element sequence is identical to the second contact element sequence. The contact elements with the first contact element sequence and the second contact element sequence are matched when the contact element pattern is geometrically rotated by 180° with respect to a row direction and a column direction.
Public/Granted literature
- US20220208684A1 INTERFACE OF INTEGRATED CIRCUIT DIE AND METHOD FOR ARRANGING INTERFACE THEREOF Public/Granted day:2022-06-30
Information query
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