Invention Grant
- Patent Title: Semiconductor structure and manufacturing method thereof
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Application No.: US17381191Application Date: 2021-07-21
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Publication No.: US11742402B2Publication Date: 2023-08-29
- Inventor: Chih-Wei Huang , Hsu-Cheng Fan , En-Jui Li
- Applicant: NANYA TECHNOLOGY CORPORATION
- Applicant Address: TW New Taipei
- Assignee: NANYA TECHNOLOGY CORPORATION
- Current Assignee: NANYA TECHNOLOGY CORPORATION
- Current Assignee Address: TW New Taipei
- Agency: CKC & Partners Co., LLC
- Main IPC: H01L29/423
- IPC: H01L29/423 ; H01L29/40 ; H01L21/3213 ; H10B12/00 ; H01L29/78 ; H01L21/3105

Abstract:
A semiconductor structure includes a substrate, an isolation layer, a dielectric layer, an insulation layer, a conductor and a capping layer. The substrate has a concave portion. The isolation layer is located on a top surface of the substrate. The dielectric layer is located on the isolation layer. The insulation layer is located on a surface of the concave portion and extends to a sidewall of the isolation layer. The conductor is located on the insulation layer in the concave portion. The conductor has a first top surface and a second top surface, and the first top surface is closer to the dielectric layer than the second top surface. The capping layer is located in the concave portion and covers the conductor.
Public/Granted literature
- US20230021814A1 SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF Public/Granted day:2023-01-26
Information query
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