Invention Grant
- Patent Title: Clock and data recovery lock detection circuit for verifying lock condition in presence of imbalanced early to late vote ratios
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Application No.: US17937197Application Date: 2022-09-30
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Publication No.: US11742861B2Publication Date: 2023-08-29
- Inventor: Kiarash Gharibdoust , Ali Hormati
- Applicant: KANDOU LABS SA
- Applicant Address: CH Lausanne
- Assignee: KANDOU LABS SA
- Current Assignee: KANDOU LABS SA
- Current Assignee Address: CH Lausanne
- Main IPC: H03L7/08
- IPC: H03L7/08 ; H03K19/21 ; H03L7/089 ; H03L7/197

Abstract:
Methods and systems are described for generating early and late votes for a clock recovery system, each early or late vote associated with a detected transitional data pattern in a data stream, generating a first early-late vote measurement reflective of an imbalance between the early and late votes that are generated during a first time interval, generating a second early-late vote measurement reflective of an imbalance between the early and late votes that are generated during a second time interval, comparing the first and the second early-late vote measurements, and outputting a CDR-lock signal at least in part responsive to determining that the first and the second early-late vote measurements are within a predetermined threshold.
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