Scan test control decoder with storage elements for use within integrated circuit (IC) devices having limited test interface
Abstract:
An integrated circuit (IC) includes logic components and a scan test circuit coupled to the logic components. The IC also includes a scan input pin coupled to the scan test circuit. The IC also includes a scan input/output pin coupled to the scan test circuit. The scan test circuit includes a decoder coupled to at least one of the scan input pin and the scan input/output pin. The decoder includes storage elements configured to store different scan control signals and to output at least one of the different scan control signals in response to a master control signal.
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