Invention Grant
- Patent Title: Detect multifold disturbance and minimize read-disturb errors in NAND flash
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Application No.: US17568830Application Date: 2022-01-05
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Publication No.: US11748195B2Publication Date: 2023-09-05
- Inventor: Kushal S. Patel , Puja Leekha , Subhojit Roy , Sarvesh S. Patel
- Applicant: International Business Machines Corporation
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agent Monchai Chuaychoo
- Main IPC: G06F11/10
- IPC: G06F11/10 ; G06F11/07 ; G06F3/06

Abstract:
An approach for reducing disturbed errors in a flash memory device is disclosed. The approach includes collecting information associated with one or more; determining one or more frequently accessed data blocks from the one or more blocks based on the collected information; determining one or more neighboring blocks from the one or more blocks based on the collected information; determining if the one or more neighboring blocks exceeds a disturbance threshold; and in responsive to the one or more neighboring blocks has exceeded the disturbance threshold, re-align the one or more blocks.
Public/Granted literature
- US20230214293A1 DETECT MULTIFOLD DISTURBANCE AND MINIMIZE READ-DISTURB ERRORS IN NAND FLASH Public/Granted day:2023-07-06
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