Detect multifold disturbance and minimize read-disturb errors in NAND flash
Abstract:
An approach for reducing disturbed errors in a flash memory device is disclosed. The approach includes collecting information associated with one or more; determining one or more frequently accessed data blocks from the one or more blocks based on the collected information; determining one or more neighboring blocks from the one or more blocks based on the collected information; determining if the one or more neighboring blocks exceeds a disturbance threshold; and in responsive to the one or more neighboring blocks has exceeded the disturbance threshold, re-align the one or more blocks.
Information query
Patent Agency Ranking
0/0