- Patent Title: Cache tuning device, cache tuning method, and cache tuning program
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Application No.: US17626590Application Date: 2019-07-29
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Publication No.: US11748269B2Publication Date: 2023-09-05
- Inventor: Tetsuro Nakamura , Naoki Takada
- Applicant: Nippon Telegraph and Telephone Corporation
- Applicant Address: JP Tokyo
- Assignee: Nippon Telegraph and Telephone Corporation
- Current Assignee: Nippon Telegraph and Telephone Corporation
- Current Assignee Address: JP Tokyo
- Agency: Fish & Richardson P.C.
- International Application: PCT/JP2019/029690 2019.07.29
- International Announcement: WO2021/019652A 2021.02.04
- Date entered country: 2022-01-12
- Main IPC: G06F12/1045
- IPC: G06F12/1045 ; G06F3/06

Abstract:
Performance optimization is achieved by clarifying cache usage characteristics of each application from usage conditions of physical resources (caches) in real time and automatically controlling the cache usage amount of each application. Thus, a system includes a main memory to and from which data is written and read, a level 3 cache memory which can be accessed faster than the main memory, a CPU core configured to execute processing by performing write and read to and from the memory and the cache, a usage amount measurement unit configured to measure a usage condition of a cache of each virtual machine (13a to 13c) executed by the CPU core, an allocation amount calculation unit configured to calculate cache capacity to be allocated to each virtual machine (13a to 13c) from the usage condition, and a control unit configured to allocate the cache capacity to each virtual machine (13a to 13c).
Public/Granted literature
- US20220318159A1 CACHE TUNING DEVICE, CACHE TUNING METHOD, AND CACHE TUNING PROGRAM Public/Granted day:2022-10-06
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