Invention Grant
- Patent Title: Method and electronic device for configuring signal pads between three-dimensional stacked chips
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Application No.: US17458598Application Date: 2021-08-27
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Publication No.: US11748545B2Publication Date: 2023-09-05
- Inventor: Yu-Jung Huang , Mong-Na Lo Huang , Tzu-Lun Yuan , Mei-Hui Guo
- Applicant: I-SHOU UNIVERSITY
- Applicant Address: TW Kaohsiung
- Assignee: I-SHOU UNIVERSITY
- Current Assignee: I-SHOU UNIVERSITY
- Current Assignee Address: TW Kaohsiung
- Agency: JCIPRNET
- Priority: TW 0128699 2021.08.04
- Main IPC: G06F30/00
- IPC: G06F30/00 ; G06F30/392 ; H04B17/391 ; H01L25/065

Abstract:
A method and an electronic device for configuring signal pads between three-dimensional stacked chips are provided. The method includes: obtaining a plurality of frequency response curves corresponding to a plurality of parameter sets; obtaining an operating frequency; selecting a selected frequency response curve from the plurality of frequency response curves according to the operating frequency, where the selected frequency response curve corresponds to a selected parameter set among the plurality of parameter sets; generating, according to the selected parameter set, a signal pad configuration for configuring a first signal pad and a second signal pad on a surface of a chip; and outputting the signal pad configuration.
Public/Granted literature
- US20230038144A1 METHOD AND ELECTRONIC DEVICE FOR CONFIGURING SIGNAL PADS BETWEEN THREE-DIMENSIONAL STACKED CHIPS Public/Granted day:2023-02-09
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