In an odd frame, a plurality of scanning lines are selected sequentially, and in one pixel circuit, when a scanning line corresponding to the one pixel circuit is selected, a first selector electrically couples one end of a first capacitance element to a data line, and a second selector electrically couples one end of a second capacitance element to the gate node of a transistor. In an even frame, the plurality of scanning lines are selected sequentially, and when the scanning line is selected, the first selector electrically couples one end of the second capacitance element to the data line, and the second selector electrically couples one end of the first capacitance element to the gate node.