Invention Grant
- Patent Title: Package substrate and method for manufacturing the same
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Application No.: US16824425Application Date: 2020-03-19
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Publication No.: US11749619B2Publication Date: 2023-09-05
- Inventor: You-Lung Yen , Pao-Hung Chou , Chun-Hsien Yu
- Applicant: Advanced Semiconductor Engineering, Inc. , Phoenix Pioneer Technology Co., Ltd.
- Applicant Address: TW Kaohsiung
- Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.,PHOENIX PIONEER TECHNOLOGY CO., LTD.
- Current Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.,PHOENIX PIONEER TECHNOLOGY CO., LTD.
- Current Assignee Address: TW Kaohsiung; TW Hsinchu County
- Agency: FOLEY & LARDNER LLP
- Main IPC: H01L23/00
- IPC: H01L23/00 ; H01L23/31 ; H01L23/14 ; H01L23/498 ; H01L21/48 ; H01L21/56 ; H01L21/683

Abstract:
A package substrate and method of manufacturing a package substrate and a semiconductor device package are provided. The package substrate includes a circuit layer, a molding layer and a sacrificial layer. The circuit layer includes conductive traces and conductive pads. The molding layer has an upper surface and a lower surface opposite to the upper surface, wherein the molding layer partially covers the conductive traces and the conductive pads, and first surfaces of the conductive traces and first surfaces of the conductive pads are exposed from the upper surface of the molding layer. The sacrificial layer covers the lower surface of the molding layer, second surfaces of the conductive pads.
Public/Granted literature
- US11791281B2 Package substrate and method for manufacturing the same Public/Granted day:2023-10-17
Information query
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