Invention Grant
- Patent Title: Multi-die, vertical-wire package-in-package apparatus, and methods of making same
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Application No.: US16647372Application Date: 2017-12-28
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Publication No.: US11749653B2Publication Date: 2023-09-05
- Inventor: Hyoung Il Kim , Florence R. Pon , Yi Elyn Xu
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Schwegman Lundberg & Woessner, P.A.
- International Application: PCT/US2017/068780 2017.12.28
- International Announcement: WO2019/132933A 2019.07.04
- Date entered country: 2020-03-13
- Main IPC: H01L25/10
- IPC: H01L25/10 ; H01L23/00 ; H01L25/065 ; H01L25/00

Abstract:
A vertical-wire package-in-package includes at least two memory-die stacks that form respective memory modules that are stacked vertically on a bond-wire board. Each memory die in the memory-die stack includes a vertical bond wire that emerges from a matrix for connection. The matrix encloses the memory-die stack, the spacer, and a redistribution layer. At least two memory modules are assembled in a vertical-wire package-in-package.
Public/Granted literature
- US20210288034A1 MULTI-DIE, VERTICAL-WIRE PACKAGE-IN-PACKAGE APPARATUS, AND METHODS OF MAKING SAME Public/Granted day:2021-09-16
Information query
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