Invention Grant
- Patent Title: Integrated circuit structure
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Application No.: US17366544Application Date: 2021-07-02
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Publication No.: US11749679B2Publication Date: 2023-09-05
- Inventor: Yi-Juei Lee , Chia-Ming Liang , Chi-Hsin Chang , Jin-Aun Ng , Yi-Shien Mor , Huai-Hsien Chiu
- Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Applicant Address: TW Hsinchu
- Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Current Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Current Assignee Address: TW Hsinchu
- Agency: Maschoff Brennan
- The original application number of the division: US15631000 2017.06.23
- Main IPC: H01L27/088
- IPC: H01L27/088 ; H01L27/02 ; H01L29/06 ; H01L29/08 ; H01L21/8234 ; H01L21/311 ; H01L21/3105 ; H01L29/66 ; H01L29/78 ; H01L29/165 ; H01L29/423

Abstract:
An IC fabrication method includes forming a first fin on a semiconductor substrate, forming an isolation dielectric material over the first fin, and planarizing the isolation dielectric material. A top surface of the first fin is covered by the isolation dielectric material after planarizing the isolation dielectric material. The method further includes etching back the isolation dielectric material until the first fin protrudes from the isolation dielectric material.
Public/Granted literature
- US20210335785A1 INTEGRATED CIRCUIT STRUCTURE Public/Granted day:2021-10-28
Information query
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