Invention Grant
- Patent Title: Doping profile for strained source/drain region
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Application No.: US17110592Application Date: 2020-12-03
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Publication No.: US11749752B2Publication Date: 2023-09-05
- Inventor: Hsueh-Chang Sung , Tsz-Mei Kwok , Kun-Mu Li , Tze-Liang Lee , Chii-Horng Li
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsinchu
- Agency: Eschweiler & Potashnik, LLC
- The original application number of the division: US15589259 2017.05.08
- Main IPC: H01L29/78
- IPC: H01L29/78 ; H01L29/161 ; H01L29/66 ; H01L21/02 ; H01L21/324 ; H01L29/04 ; H01L29/08 ; H01L29/165

Abstract:
The present disclosure relates to a method of forming a transistor device. The method may be performed by forming a gate structure onto a semiconductor substrate and forming a source/drain recess within the semiconductor substrate adjacent to a side of the gate structure. One or more strain inducing materials are formed within the source/drain recess. The one or more strain inducing materials include a strain inducing component with a strain inducing component concentration profile that continuously decreases from a bottommost surface of the one or more strain inducing materials to a position above the bottommost surface. The bottommost surface contacts the semiconductor substrate.
Public/Granted literature
- US20210119048A1 DOPING PROFILE FOR STRAINED SOURCE/DRAIN REGION Public/Granted day:2021-04-22
Information query
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