- Patent Title: Receiver synchronization for higher speed passive optical networks
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Application No.: US17117206Application Date: 2020-12-10
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Publication No.: US11750290B2Publication Date: 2023-09-05
- Inventor: Rainer Strobel , Gert Schedelbeck
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: INTEL CORPORATION
- Current Assignee: INTEL CORPORATION
- Current Assignee Address: US CA Santa Clara
- Agency: 2SPL Patentanwälte PartG mbB
- Agent Yong Beom Hwang
- Main IPC: H04B10/27
- IPC: H04B10/27 ; H04L7/00 ; H04L1/00

Abstract:
An optical network receiver (ONU) circuit associated with a passive optical network (PON) is disclosed. The ONU circuit comprises one or more processors is configured to operate in a hunt state, wherein the one or more processors is configured to detect frame boundaries associated with an incoming data signal based on a detecting a predefined synchronization (psync) pattern associated with the incoming data signal and transition to a pre-sync state, when the predefined psync pattern is detected correctly. The one or more processors is further configured to operate in the pre-sync state, wherein the one or more processors is configured to perform forward error correction (FEC) decoding for the incoming data signal, in order to determine signal statistics associated with the incoming data signal.
Public/Granted literature
- US20210184771A1 RECEIVER SYNCHRONIZATION FOR HIGHER SPEED PASSIVE OPTICAL NETWORKS Public/Granted day:2021-06-17
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