Invention Grant
- Patent Title: Three-dimensional memory device with reduced memory unit interference and manufacturing method thereof
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Application No.: US16664932Application Date: 2019-10-27
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Publication No.: US11751389B2Publication Date: 2023-09-05
- Inventor: Qiguang Wang
- Applicant: Yangtze Memory Technologies Co., Ltd.
- Applicant Address: CN Wuhan
- Assignee: Yangtze Memory Technologies Co., Ltd.
- Current Assignee: Yangtze Memory Technologies Co., Ltd.
- Current Assignee Address: CN Wuhan
- Agent Winston Hsu
- Main IPC: H10B43/27
- IPC: H10B43/27 ; H10B43/35

Abstract:
A three-dimensional (3D) memory device and a manufacturing method thereof are provided. The 3D memory device includes a substrate, insulation layers, gate material layers, and a vertical structure. The insulation layers and the gate material layers are disposed on the substrate and alternately stacked in a vertical direction. The vertical structure penetrates the gate material layers in the vertical direction. The vertical structure includes a semiconductor layer and a trapping layer. The semiconductor layer is elongated in the vertical direction. The trapping layer surrounds the semiconductor layer in a horizontal direction. The trapping layer includes trapping sections aligned in the vertical direction and separated from one another. The electrical performance of the 3D memory device may be improved by the trapping sections separated from one another.
Public/Granted literature
- US20210091106A1 THREE-DIMENSIONAL MEMORY DEVICE AND MANUFACTURING METHOD THEREOF Public/Granted day:2021-03-25
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