Invention Grant
- Patent Title: Neural network semiconductor device and system using the same
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Application No.: US17359859Application Date: 2021-06-28
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Publication No.: US11755286B2Publication Date: 2023-09-12
- Inventor: Shintaro Harada , Yoshiyuki Kurokawa , Takeshi Aoki
- Applicant: Semiconductor Energy Laboratory Co., Ltd.
- Applicant Address: JP Atsugi
- Assignee: Semiconductor Energy Laboratory Co., Ltd.
- Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
- Current Assignee Address: JP Atsugi
- Agency: Fish & Richardson P.C.
- Priority: JP 16200757 2016.10.12 JP 16200760 2016.10.12 JP 17017446 2017.02.02
- The original application number of the division: US15729150 2017.10.10
- Main IPC: G06F7/544
- IPC: G06F7/544 ; G06N3/065 ; H01L29/786 ; G06N3/04

Abstract:
A semiconductor device capable of performing product-sum operation is provided. The semiconductor device includes a first memory cell, a second memory cell, and an offset circuit. The semiconductor device retains first analog data and reference analog data in the first memory cell and the second memory cell, respectively. A potential corresponding to second analog data is applied to each of them as a selection signal, whereby current depending on the sum of products of the first analog data and the second analog data is obtained. The offset circuit includes a constant current circuit comprising a transistor and a capacitor. A first terminal of the transistor is electrically connected to a first gate of the transistor and a first terminal of the capacitor. A second gate of the transistor is electrically connected to a second terminal of the capacitor. A voltage between the first terminal and the second gate of the transistor is held in the capacitor, whereby a change in source-drain current of the transistor can be suppressed.
Public/Granted literature
- US20210326117A1 SEMICONDUCTOR DEVICE AND SYSTEM USING THE SAME Public/Granted day:2021-10-21
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