Invention Grant
- Patent Title: Programmable macro test design for an integrated circuit
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Application No.: US17513584Application Date: 2021-10-28
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Publication No.: US11755803B2Publication Date: 2023-09-12
- Inventor: Senwen Kan
- Applicant: Cypress Semiconductor Corporation
- Applicant Address: US CA San Jose
- Assignee: Cypress Semiconductor Corporation
- Current Assignee: Cypress Semiconductor Corporation
- Current Assignee Address: US CA San Jose
- Main IPC: G01R31/317
- IPC: G01R31/317 ; G06F30/333

Abstract:
A system and method for using a programmable macro built-in self-test (BIST) to test an integrated circuit. The method includes receiving, by a built-in self-test (BIST) controller of an integrated circuit (IC) device from a testing equipment, a test vector of a first type for testing a first region of the IC device. The method includes identifying, based on the test vector of the first type, a first BIST engine of a plurality of BIST engines associated with the first region of the IC device. The method includes generating, based on the test vector of the first type, a first command of the second type. The method includes configuring, based on the first command of the second type, the first BIST engine of the plurality of BIST engines to cause the first BIST engine to perform a first set of tests on the first region of the IC device.
Public/Granted literature
- US20230135977A1 PROGRAMMABLE MACRO TEST DESIGN FOR AN INTEGRATED CIRCUIT Public/Granted day:2023-05-04
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