Invention Grant
- Patent Title: GOA circuit and display panel
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Application No.: US17056717Application Date: 2020-10-20
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Publication No.: US11756497B2Publication Date: 2023-09-12
- Inventor: Yan Li
- Applicant: SHENZHEN CHINA STAR OPTOELECTRONICS SEMICONDUCTOR DISPLAY TECHNOLOGY CO., LTD.
- Applicant Address: CN Shenzhen
- Assignee: SHENZHEN CHINA STAR OPTOELECTRONICS SEMICONDUCTOR DISPLAY TECHNOLOGY CO., LTD.
- Current Assignee: SHENZHEN CHINA STAR OPTOELECTRONICS SEMICONDUCTOR DISPLAY TECHNOLOGY CO., LTD.
- Current Assignee Address: CN Shenzhen
- Agency: PV IP PC
- Agent Wei Te Chung; Zhigang Ma
- Priority: CN 2010978416.6 2020.09.17
- International Application: PCT/CN2020/122024 2020.10.20
- International Announcement: WO2022/056992A 2022.03.24
- Date entered country: 2020-11-18
- Main IPC: G09G3/36
- IPC: G09G3/36 ; G09G3/00 ; G11C19/28

Abstract:
A gate driver on array (GOA) circuit and a display panel is provided. The GOA circuit includes a plurality of cascading GOA units. A current stage of the GOA units includes: a pull-up module, a pull-up control circuit unit, and a selection module. The pull-up module includes a first transistor. A source of the first transistor is connected to the selection module, a gate is connected to the pull-up control module through a first node, and a drain is configured to output a scan signal of the current stage. The selection module is configured to receive a first control signal and a second control signal to control the clock signal to transmit to the source of the first transistor.
Public/Granted literature
- US20220351697A1 GOA CIRCUIT AND DISPLAY PANEL Public/Granted day:2022-11-03
Information query
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