Invention Grant
- Patent Title: Semiconductor devices with fin-top hard mask and methods for fabrication thereof
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Application No.: US16996781Application Date: 2020-08-18
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Publication No.: US11757021B2Publication Date: 2023-09-12
- Inventor: Yi-Ruei Jhan , Kuan-Ting Pan , Kuo-Cheng Chiang , Kuan-Lun Cheng , Chih-Hao Wang
- Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Applicant Address: TW Hsinchu
- Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Current Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Current Assignee Address: TW Hsinchu
- Agency: NZ CARR LAW OFFICE
- Main IPC: H01L29/66
- IPC: H01L29/66 ; H01L21/02 ; H01L21/306 ; H01L21/308 ; H01L29/06 ; H01L29/423 ; H01L29/786

Abstract:
The present disclosure provide a method for using a hard mask layer on a top surface of fin structures to form a fin-top mask layer. The fin-top mask layer can function as an etch stop for subsequent processes. Using the fin-top hard mask layer allows a thinner conformal dielectric layer to be used to protect semiconductor fins during the subsequent process, such as during etching of sacrificial gate electrode layer. Using a thinner conformal dielectric layer can reduce the pitch of fins, particularly for input/output devices.
Public/Granted literature
- US20220059678A1 SEMICONDUCTOR DEVICES WITH FIN-TOP HARD MASK AND METHODS FOR FABRICATION THEREOF Public/Granted day:2022-02-24
Information query
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