Invention Grant
- Patent Title: Semiconducting metal oxide transistors having a patterned gate and methods for forming the same
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Application No.: US17216747Application Date: 2021-03-30
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Publication No.: US11757047B2Publication Date: 2023-09-12
- Inventor: Yong-Jie Wu , Yen-Chung Ho , Hui-Hsien Wei , Chia-Jung Yu , Pin-Cheng Hsu , Mauricio Manfrini , Chung-Te Lin
- Applicant: Taiwan Semiconductor Manufacturing Company Limited
- Applicant Address: TW Hsinchu
- Assignee: Taiwan Semiconductor Manufacturing Company Limited
- Current Assignee: Taiwan Semiconductor Manufacturing Company Limited
- Current Assignee Address: TW Hsinchu
- Agency: The Marbury Law Group, PLLC
- Main IPC: H01L29/786
- IPC: H01L29/786 ; H01L29/423 ; H01L29/66 ; H01L29/417 ; H01L29/40

Abstract:
A semiconductor device includes a first dielectric layer, a gate electrode embedded within the first dielectric layer, a layer stack including a gate dielectric layer, a channel layer including a semiconducting metal oxide material, and a second dielectric layer, and a source electrode and a drain electrode embedded in the second dielectric layer and contacting a respective portion of a top surface of the channel layer. A combination of the gate electrode, the gate dielectric layer, the channel layer, the source electrode, and the drain electrode forms a transistor. The total length of the periphery of a bottom surface of the channel layer that overlies the gate electrode is equal to the width of the gate electrode or twice the width of the gate electrode, and resputtering of the gate electrode material on sidewalls of the channel layer is minimized.
Public/Granted literature
- US20210376164A1 SEMICONDUCTING METAL OXIDE TRANSISTORS HAVING A PATTERNED GATE AND METHODS FOR FORMING THE SAME Public/Granted day:2021-12-02
Information query
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