Invention Grant
- Patent Title: Read operation circuit, semiconductor memory, and read operation method
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Application No.: US17242258Application Date: 2021-04-27
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Publication No.: US11762579B2Publication Date: 2023-09-19
- Inventor: Liang Zhang
- Applicant: CHANGXIN MEMORY TECHNOLOGIES, INC.
- Applicant Address: CN Hefei
- Assignee: Changxin Memory Technologies, Inc.
- Current Assignee: Changxin Memory Technologies, Inc.
- Current Assignee Address: CN Hefei
- Agency: KILPATRICK TOWNSEND & STOCKTON LLP
- Priority: CN 1911021478.1 2019.10.25
- Main IPC: G06F3/06
- IPC: G06F3/06 ; G11C7/10 ; G11C11/4091 ; G11C11/4093 ; G11C11/4096

Abstract:
Embodiments provide a read operation circuit, a semiconductor memory, and a read operation method. The read operation circuit includes: a DBI encoder configured to read read data from a memory bank, and determine whether to invert the read data according to the number of bits of low data in the read data to output global bus data for transmission through a global bus and DBI data for transmission through a DBI signal line, wherein a DBI port is configured to receive the DBI data; a parallel-to-serial conversion circuit configured to perform parallel-to-serial conversion on the global bus data to generate output data of the DQ port; a data buffer module connected to the memory bank through the global bus; and a precharge module connected to a precharge signal line and configured to set an initial state of the global bus to High.
Public/Granted literature
- US20210247928A1 READ OPERATION CIRCUIT, SEMICONDUCTOR MEMORY, AND READ OPERATION METHOD Public/Granted day:2021-08-12
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