- Patent Title: Data sorting control circuit and memory device including the same
-
Application No.: US17678488Application Date: 2022-02-23
-
Publication No.: US11763859B2Publication Date: 2023-09-19
- Inventor: In Sung Koh
- Applicant: SK hynix Inc.
- Applicant Address: KR Gyeonggi-do
- Assignee: SK hynix Inc.
- Current Assignee: SK hynix Inc.
- Current Assignee Address: KR Gyeonggi-do
- Agency: IP & T GROUP LLP
- Priority: KR 20200050046 2020.04.24
- The original application number of the division: US17139006 2020.12.31
- Main IPC: G11C7/00
- IPC: G11C7/00 ; G11C7/10

Abstract:
A data sorting control circuit includes a phase detector suitable for detecting a phase of each of a first clock signal, a second clock signal, a third clock signal, and a fourth clock signal in response to a read command, an order determiner suitable for determining a data order as a first order or a second order based on a seed address and the detected phase of each of the clock signals, and an sorting control signal generator suitable for shifting the read command based on the first clock signal to the fourth clock signal to generate a first sorting control signal, a second sorting control signal, a third sorting control signal, and a fourth sorting control signal, and outputting the first sorting control signal to the fourth sorting control signal according to the first order or the second order.
Public/Granted literature
- US20220180906A1 DATA SORTING CONTROL CIRCUIT AND MEMORY DEVICE INCLUDING THE SAME Public/Granted day:2022-06-09
Information query