This application relates to a signal filtering device. The device includes a memory and a processor. The processor may generate one or more matrices based on a size of a digital filter bank that generates an output signal by dividing an input signal into a plurality of channels and store in the memory each of the generated one or more matrices to which a plurality of digital filter bank coefficients or a plurality of input signals are assigned. The processor may also partially calculate the stored plurality of digital filter bank coefficients and the plurality of signals based on a number of at least some of the plurality of channels, and calculate the calculated digital filter bank coefficients and signals. The processor may further perform a discrete Fourier transform (DFT) on the calculated signal and compensate for a phase of the discrete Fourier transformed signal according to a preset reference.