Invention Grant
- Patent Title: Double-sided wafer polishing method
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Application No.: US16320841Application Date: 2017-05-23
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Publication No.: US11772231B2Publication Date: 2023-10-03
- Inventor: Shunsuke Mikuriya , Tomonori Miura
- Applicant: SUMCO CORPORATION
- Applicant Address: JP Tokyo
- Assignee: SUMCO CORPORATION
- Current Assignee: SUMCO CORPORATION
- Current Assignee Address: JP Tokyo
- Agency: Greenblum & Bernstein, P.L.C.
- Priority: JP 16150449 2016.07.29
- International Application: PCT/JP2017/019129 2017.05.23
- International Announcement: WO2018/020798A 2018.02.01
- Date entered country: 2019-01-25
- Main IPC: B24B37/28
- IPC: B24B37/28 ; H01L21/304 ; B24B37/04 ; B24B49/00

Abstract:
Provided is a double-sided polishing method of a wafer in which the wafer, which has been set in a wafer loading hole of the carrier, is compressed and held along with the carrier with an upper platen and a lower platen and the upper platen and the lower platen are rotated while supplying slurry to the wafer. The method includes: previously measuring an inclination value of a main surface of each of a plurality of carriers in the vicinity of the edge of the wafer loading hole; selecting, from among the plurality of carriers, those for which the inclination value is equal to or smaller than a threshold based on the measurement results of the inclination value; and applying the double-sided polishing to a wafer using the selected carrier.
Public/Granted literature
- US20190160627A1 DOUBLE-SIDED WAFER POLISHING METHOD Public/Granted day:2019-05-30
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