Invention Grant
- Patent Title: Fin patterning to reduce fin collapse and transistor leakage
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Application No.: US17109504Application Date: 2020-12-02
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Publication No.: US11776816B2Publication Date: 2023-10-03
- Inventor: Victor Moroz , Xi-Wei Lin
- Applicant: Synopsys, Inc.
- Applicant Address: US CA Mountain View
- Assignee: Synopsys, Inc.
- Current Assignee: Synopsys, Inc.
- Current Assignee Address: US CA Sunnyvale
- Agency: Park, Vaughan, Fleming & Dowler LLP
- Agent Laxman Sahasrabuddhe
- Main IPC: H01L21/3065
- IPC: H01L21/3065 ; H01L21/308 ; G06F30/392 ; G06F30/398 ; H01L29/66

Abstract:
At least one fin structure may be created on a silicon substrate. Next, a width of the at least one fin structure may be decreased by applying one or more iterations of a self-limiting fin etch process.
Public/Granted literature
- US20220172953A1 FIN PATTERNING TO REDUCE FIN COLLAPSE AND TRANSISTOR LEAKAGE Public/Granted day:2022-06-02
Information query
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