Invention Grant
- Patent Title: Combination-bonded die pair packaging and associated systems and methods
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Application No.: US17674487Application Date: 2022-02-17
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Publication No.: US11776926B2Publication Date: 2023-10-03
- Inventor: Kyle K. Kirby , Bret K. Street
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Perkins Coie LLP
- Main IPC: H01L23/00
- IPC: H01L23/00 ; H01L23/48 ; H01L25/065 ; H01L25/00

Abstract:
Systems and methods for semiconductor devices having a substrate with bond pads, a die pair in a stacked configuration above the bond pads and having a first die having an oxide layer, a second die having an oxide layer attached to the first oxide layer, and conductive bonds electrically coupling the dies. Interconnects extend between the bond pads and the die pair, electrically coupling die pair to the substrate. The device may include a second die pair electrically coupled to: (1) the first die pair with secondary interconnects; and (2) the substrate with through-silicon vias extending through the first die pair. The top die of a die pair may be a thick die for use at the top of a pair stack. Pairs may be created by matching dies of a first silicon wafer to dies of a second silicon wafer, combination bonding the wafers, and dicing the die pairs.
Public/Granted literature
- US20220246569A1 COMBINATION-BONDED DIE PAIR PACKAGING AND ASSOCIATED SYSTEMS AND METHODS Public/Granted day:2022-08-04
Information query
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