To increase the efficiency of an electronic design automation (EDA) process, for a putative integrated circuit design for which computerized routing is to be carried out within an EDA program, run a sweep line algorithm selectively on active metal shapes in said putative design for different layers, to determine a total number of said active metal shapes, and compute a memory requirement for computerized routing on said active shapes based on said total number of said active shapes. For said putative design, compute a memory requirement for computerized routing on inactive metal shapes based on a total number of said inactive shapes; partition said putative design into a plurality of partitions, based on said memory requirement for computerized routing on said active and inactive shapes, such that an available system memory is not exceeded. Separately run a routing job on each of said plurality of partitions.