Invention Grant
- Patent Title: Method for reticle enhancement technology of a design pattern to be manufactured on a substrate
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Application No.: US17444140Application Date: 2021-07-30
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Publication No.: US11783110B2Publication Date: 2023-10-10
- Inventor: Akira Fujimura , P. Jeffrey Ungar , Nagesh Shirali
- Applicant: D2S, Inc.
- Applicant Address: US CA San Jose
- Assignee: D2S, Inc.
- Current Assignee: D2S, Inc.
- Current Assignee Address: US CA San Jose
- Agency: MLO, a professional corp.
- Main IPC: G06F30/30
- IPC: G06F30/30 ; G06F30/398 ; G03F1/36 ; G03F1/70 ; G03F1/74 ; G03F1/78 ; G03F7/20 ; G03F7/00 ; G06F119/18

Abstract:
Methods for reticle enhancement technology (RET) for use with variable shaped beam (VSB) lithography include inputting a desired pattern to be formed on a substrate; determining an initial mask pattern from the desired pattern for the substrate; optimizing the initial mask pattern for wafer quality using a VSB exposure system; and outputting the optimized mask pattern. Methods for fracturing a pattern to be exposed on a surface using VSB lithography include inputting an initial pattern; overlaying the initial pattern with a two-dimensional grid, wherein an initial set of VSB shots are formed by the union of the initial pattern with locations on the grid; merging two or more adjacent shots in the initial set of VSB shots to create a larger shot in a modified set of VSB shots; and outputting the modified set of VSB shots.
Public/Granted literature
- US20230035090A1 METHOD FOR RETICLE ENHANCEMENT TECHNOLOGY OF A DESIGN PATTERN TO BE MANUFACTURED ON A SUBSTRATE Public/Granted day:2023-02-02
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