The present disclosure provides a display substrate, including a display area and a peripheral area, where N pixel unit groups are arranged in the display area, and each pixel unit group is provided with a gate line, a first reset signal line and a second reset signal line; a driving module is arranged in the peripheral area and includes at least two driving circuits, at least two operating signal line groups are further arranged in the peripheral area, the driving circuits and the operating signal line groups are alternately arranged the at least two driving circuits include a gate driving circuit and a reset driving circuit provided with N second signal output terminals the ith second signal output terminal is coupled to the second reset signal line configured for the ith pixel unit group and the first reset signal line configured for the (i+1)th pixel unit group.