- Patent Title: Structure and formation method of chip package with fan-out feature
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Application No.: US16893939Application Date: 2020-06-05
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Publication No.: US11784091B2Publication Date: 2023-10-10
- Inventor: Ling-Wei Li , Jung-Hua Chang , Cheng-Lin Huang
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsinchu
- Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Current Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Current Assignee Address: TW Hsinchu
- Agency: Birch, Stewart, Kolasch & Birch, LLP
- Main IPC: H01L21/768
- IPC: H01L21/768 ; H01L23/538 ; H01L23/522 ; H01L25/065 ; H01L23/528 ; H01L23/00 ; H01L25/00

Abstract:
A package structure and a formation method of a package structure are provided. The method includes forming a conductive structure over a carrier substrate and disposing a semiconductor die over the carrier substrate. The method also includes forming a protective layer to surround the conductive structure and the semiconductor die. The method further includes forming an insulating layer over the protective layer. The insulating layer has an opening exposing a portion of the conductive structure. In addition, the method includes forming a conductive layer over the insulating layer. The conductive layer fills the opening, and the conductive layer has a substantially planar top surface.
Public/Granted literature
- US20210066125A1 STRUCTURE AND FORMATION METHOD OF CHIP PACKAGE WITH FAN-OUT FEATURE Public/Granted day:2021-03-04
Information query
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