Invention Grant
- Patent Title: Semiconductor structure, method of forming stacked unit layers and method of forming stacked two-dimensional material layers
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Application No.: US17460329Application Date: 2021-08-30
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Publication No.: US11784225B2Publication Date: 2023-10-10
- Inventor: Shin-Wei Shen , Tse-An Chen , Tung-Ying Lee , Lain-Jong Li
- Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
- Applicant Address: TW Hsinchu
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsinchu
- Agency: JCIPRNET
- Main IPC: H01L21/00
- IPC: H01L21/00 ; H01L27/00 ; H01L29/00 ; H01L29/10 ; H01L27/06 ; H01L27/12 ; H01L21/822 ; H01L29/66 ; H01L29/423

Abstract:
A semiconductor structure includes a semiconductor substrate, a plurality of stacked units, a conductive structure, a plurality of dielectrics, a first electrode strip, a second electrode strip, and a plurality of contact structures. The stacked units are stacked up over the semiconductor substrate, and comprises a first passivation layer, a second passivation layer and a channel layer sandwiched between the first passivation layer and the second passivation layer. The conductive structure is disposed on the semiconductor substrate and wrapping around the stacked units. The dielectrics are surrounding the stacked units and separating the stacked units from the conductive structure. The first electrode strip and the second electrode strip are located on two opposing sides of the conductive structure. The contact structures are connecting the channel layer of each of the stacked units to the first electrode strip and the second electrode strip.
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