A counting circuit and a chip are disclosed. The counting circuit includes a charge counter module including a pulse processing module and a first capacitor. The pulse processing module is configured to covert a received pulse signal into a counting current and to transfer the converted counting current to the first capacitor. The first capacitor is configured to receive the counting current and store charge carried in the counting current. The counting circuit takes a voltage of the first capacitor as a basis for counting. The input voltage pulse signal is converted into a current signal in the form of micro pulses for charging the non-variable capacitor, and a counting result is obtained by detecting the voltage of the first capacitor, achieving the following advantages: no need to take care of whether the input pulse signal is continuous or discrete; high resistance to interference; adaptiveness to various input pulse signals of different waveforms and/or with different frequencies; and the ability to solve the problem with the conventional counting circuits that they may not be able to cope with irregular pulse signals and may even not be able to operate normally when such an irregular pulse signal is input.