Anti-fuse structure and method for fabricating same, as well as semiconductor device
Abstract:
An anti-fuse structure, a method for fabricating the anti-fuse structure, and a semiconductor device are disclosed. The anti-fuse structure includes a semiconductor substrate, a fuse oxide layer, a gate material layer, a first electrode and a second electrode. An active area is defined on the semiconductor substrate by an isolation structure. The active area includes a wide portion and a narrow portion connected to each other. The fuse oxide layer is located on the semiconductor substrate, covers the narrow portion and extends to cover a first part of the wide portion. The gate material layer is formed on the fuse oxide layer. The first electrode is formed on and electrically connected to the gate material layer, while the second electrode is formed on and electrically connected to a second part of the wide portion not covered by the fuse oxide layer.
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