Invention Grant
- Patent Title: Semiconductor package and manufacturing method thereof
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Application No.: US17705409Application Date: 2022-03-28
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Publication No.: US11798893B2Publication Date: 2023-10-24
- Inventor: Yung-Chi Chu , Hung-Jui Kuo , Jhih-Yu Wang , Yu-Hsiang Hu
- Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
- Applicant Address: TW Hsinchu
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsinchu
- Agency: JCIPRNET
- The original application number of the division: US16009208 2018.06.15
- Main IPC: H01L23/538
- IPC: H01L23/538 ; H01L23/58 ; H01L23/00 ; H01L21/683 ; H01L21/48 ; H01L21/56 ; H01L23/31

Abstract:
A package includes a die and a redistribution structure. The die has an active surface and is wrapped around by an encapsulant. The redistribution structure disposed on the active surface of the die and located above the encapsulant, wherein the redistribution structure comprises a conductive via connected with the die, a routing pattern located above and connected with the conductive via, and a seal ring structure, the seal ring structure includes a first seal ring element and a second seal ring element located above and connected with the first seal ring element, wherein the second seal ring element includes a seed layer sandwiched between the first seal ring element and the second seal ring element, and a top surface of the first seal ring element is substantially coplanar with a top surface of the conductive via.
Public/Granted literature
- US20220216159A1 SEMICONDUCTOR PACKAGE AND MANUFACTURING METHOD THEREOF Public/Granted day:2022-07-07
Information query
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