A capacitor of a semiconductor device and a distributed model circuit for the same are disclosed. The capacitor includes a lower electrode layer, a plurality of upper electrode layers disposed over the lower electrode layer, a plurality of dielectric layers disposed between the lower electrode layer and each of the plurality of upper electrode layers, each dielectric layer configured to include a plurality of storage nodes, a plurality of line layers disposed over at least one of the plurality of upper electrode layers, and configured to receive a voltage for measuring an equivalent series resistance (ESR), and a plurality of contacts that electrically couple the plurality of line layers to the at least one of the plurality of upper electrode layers, wherein a resistance resulting from position information of the plurality of line layers and the plurality of contacts in a routing pattern corresponds to the ESR.