Invention Grant
- Patent Title: Latch circuit, latch method, and electronic device
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Application No.: US17648145Application Date: 2022-01-17
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Publication No.: US11804829B2Publication Date: 2023-10-31
- Inventor: Yinchuan Gu
- Applicant: CHANGXIN MEMORY TECHNOLOGIES, INC.
- Applicant Address: CN Hefei
- Assignee: CHANGXIN MEMORY TECHNOLOGIES, INC.
- Current Assignee: CHANGXIN MEMORY TECHNOLOGIES, INC.
- Current Assignee Address: CN Hefei
- Agency: Cooper Legal Group, LLC
- Priority: CN 2110815241.1 2021.07.19
- Main IPC: H03K3/02
- IPC: H03K3/02 ; H03K3/356 ; H03K19/20 ; G06F1/04

Abstract:
The present disclosure relates to a latch circuit and a latch method, and an electronic device, and relates to the technical field of integrated circuits. The latch circuit includes: a transmission module, a latch module, and a control module, wherein the transmission module is configured to transmit an input signal to the latch module; the latch module is configured to latch the input signal or output the input signal when a set signal or a reset signal is at a low level; and the control module is configured to perform control, such that a current leakage path cannot be formed between the transmission module and the latch module when the set signal or the reset signal is at a high level.
Public/Granted literature
- US20230015237A1 LATCH CIRCUIT, LATCH METHOD, AND ELECTRONIC DEVICE Public/Granted day:2023-01-19
Information query
IPC分类: