Invention Grant
- Patent Title: Manufacturing method of a semiconductor device using a protect layer along a top sidewall of a trench to widen the bottom of the trench
-
Application No.: US17647346Application Date: 2022-01-06
-
Publication No.: US11805640B2Publication Date: 2023-10-31
- Inventor: Chung-Lin Huang
- Applicant: NANYA TECHNOLOGY CORPORATION
- Applicant Address: TW New Taipei
- Assignee: NANYA TECHNOLOGY CORPORATION
- Current Assignee: NANYA TECHNOLOGY CORPORATION
- Current Assignee Address: TW New Taipei
- Agency: CKC & Partners Co., LLC
- Main IPC: H10B12/00
- IPC: H10B12/00
Abstract:
A semiconductor device includes a substrate, a passing word line in the substrate, and a dielectric structure surrounding the passing word line. The dielectric structure has an enlargement portion at a bottom of the dielectric structure, and a maximum width of the enlargement portion of the dielectric structure is wider than a width of a top of the dielectric structure.
Public/Granted literature
- US20230217650A1 SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF Public/Granted day:2023-07-06
Information query
