Invention Grant
- Patent Title: Apparatus and method for reusing manufacturing content across multi-chip packages
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Application No.: US17691160Application Date: 2022-03-10
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Publication No.: US11808811B2Publication Date: 2023-11-07
- Inventor: Kalyana Kantipudi , Niraj Vasudevan
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: VIERING,JENTSCHURA&PARTNER
- Main IPC: G01R31/3183
- IPC: G01R31/3183 ; G01R31/3181 ; G01R31/317

Abstract:
An apparatus includes a daughter die (DD) logic, and an arbitrator connected to the DD logic, and connected to an external testing device and a main die (MD) included in a multi-chip package (MCP). The apparatus further includes an enable logic configured to receive a message from the MD, based on the received message, determine whether the MD or the external testing device is enabled to access the DD logic, and based on the external testing device being determined to be enabled to access the DD logic, control the arbitrator to enable the external testing device to access the DD logic.
Public/Granted literature
- US20230288479A1 APPARATUS AND METHOD FOR REUSING MANUFACTURING CONTENT ACROSS MULTI-CHIP PACKAGES Public/Granted day:2023-09-14
Information query
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