A chip and a chip testing method are provided. The chip includes a sending terminal circuit and a test circuit. The sending terminal circuit includes a signal sending unit and a first signal bump. The first signal bump is coupled to the signal sending unit. The test circuit is coupled to a circuit node between the signal sending unit and the first signal bump. The test circuit includes a first resistor, a unit gain buffer, and an analog-to-digital converter. A first terminal of the first resistor is coupled to the circuit node. A first input terminal of the unit gain buffer is coupled to a second terminal of the first resistor. A second input terminal of the unit gain buffer is coupled to an output terminal of the unit gain buffer. An input terminal of the analog-to-digital converter is coupled to the output terminal of the unit gain buffer.