Power on reset circuit and integrated circuit including the same
Abstract:
A power on reset circuit comprises terminals for reference and supply potentials and a voltage divider coupled therebetween. First and second transistors of a bandgap circuit are resistively coupled to the reference potential terminal and have bases connected to the voltage divider. Current mirrors couple the collectors of the first and second transistors to an output terminal providing an output signal indicating a power on reset condition. A first compensation transistor is coupled between the collector of one of the transistors and the reference potential terminal, and a second compensation transistor is coupled between the output terminal and the reference potential terminal to compensate the effect of parasitic substrate currents in response to an external interference.
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