Invention Grant
- Patent Title: Packet processing apparatus and packet processing method
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Application No.: US17108334Application Date: 2020-12-01
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Publication No.: US11844063B2Publication Date: 2023-12-12
- Inventor: Kazuto Nishimura , Nobuhiro Rikitake
- Applicant: FUJITSU LIMITED
- Applicant Address: JP Kawasaki
- Assignee: FUJITSU LIMITED
- Current Assignee: FUJITSU LIMITED
- Current Assignee Address: JP Kawasaki
- Agency: Fujitsu Patent Center
- Priority: JP 19230637 2019.12.20
- Main IPC: H04W72/12
- IPC: H04W72/12 ; H04W72/1263 ; H04L5/14

Abstract:
A packet processing apparatus includes a memory, a processor, a first gate, and a second gate. The memory stores a plurality of allocation patterns for allocating an upstream or downstream of a link direction for each subframe within a predetermined period. The processor obtains a periodicity pattern of a high-priority packet for each of time slots within the subframe. The first gate opens and closes, for each of the time slots within the subframe, output of the high-priority packet. The second gate opens and closes, for each of the time slots within the subframe, output of a low-priority packet. The processor sets gate states of the first gate and the second gate for a predetermined time slot within the subframe in the same link direction as the periodicity pattern to a priority state in which the high-priority packet is preferentially output according to the periodicity pattern.
Public/Granted literature
- US20210195615A1 PACKET PROCESSING APPARATUS AND PACKET PROCESSING METHOD Public/Granted day:2021-06-24
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