Invention Grant
- Patent Title: Encoding-aware data routing
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Application No.: US17737877Application Date: 2022-05-05
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Publication No.: US11853572B2Publication Date: 2023-12-26
- Inventor: Raghavendra Gopalakrishnan , Vivek Kumar
- Applicant: Western Digital Technologies, Inc.
- Applicant Address: US CA San Jose
- Assignee: WESTERN DIGITAL TECHNOLOGIES, INC.
- Current Assignee: WESTERN DIGITAL TECHNOLOGIES, INC.
- Current Assignee Address: US CA San Jose
- Agency: ARENTFOX SCHIFF LLP
- Main IPC: G06F3/06
- IPC: G06F3/06 ; G06F12/02

Abstract:
Aspects of the disclosure are directed to a storage device including a memory and a controller. The memory may include a plurality of flash memory blocks such as single level cell (SLC) blocks and multi-level cell (MLC) blocks. The controller may maintain a read count of each of the SLC blocks to determine which of the blocks contains data associated with the highest number of read commands. Based on the read commands, the controller may relocate the associated data into pages of MLC blocks that have a lower number of senses required to read the data stored in those blocks.
Public/Granted literature
- US20230359378A1 ENCODING-AWARE DATA ROUTING Public/Granted day:2023-11-09
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