Multiple time programmable memory using one time programmable memory and error correction codes
Abstract:
The present invention relates to the field of digital memory, and in particular to a multiple-time programmable (MTP) memory employing error correction codes (ECC), the MTP memory being made up of one-time programmable (OTP) memory modules. Pointers to the memory address of currently in-use OTP memory blocks in use for each virtual MTP memory block are stored in OTP memory with an error correcting code. The pointers encode the memory addresses according to a scheme that ensure that only bit changes in a single direction are required in both the pointer data and the error correction code when the memory address is incremented.
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