Invention Grant
- Patent Title: Structure for multiple sense amplifiers of memory device
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Application No.: US18156707Application Date: 2023-01-19
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Publication No.: US11854617B2Publication Date: 2023-12-26
- Inventor: Hiroki Noguchi , Ku-Feng Lin
- Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
- Applicant Address: TW Hsinchu
- Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
- Current Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
- Current Assignee Address: TW Hsinchu
- Agency: Birch, Stewart, Kolasch & Birch, LLP
- Main IPC: G11C11/00
- IPC: G11C11/00 ; G11C13/00

Abstract:
A memory device is provided. The memory device includes several sense amplifiers and at least one reference cell. Each of the sense amplifiers has a first terminal and a second terminal. The first terminals of the sense amplifiers are coupled to a memory cell block, and the second terminals of the sense amplifiers are coupled together to transmit a read current. The at least one reference cell transmits the read current to a ground terminal. The at least one reference cell has a decreased resistance value when a number N of the sense amplifiers increases.
Public/Granted literature
- US20230154533A1 STRUCTURE FOR MULTIPLE SENSE AMPLIFIERS OF MEMORY DEVICE Public/Granted day:2023-05-18
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