Invention Grant
- Patent Title: Capacitor intergated structure.capacitor unit and manufacturing process thereof
-
Application No.: US17352255Application Date: 2021-06-19
-
Publication No.: US11854742B2Publication Date: 2023-12-26
- Inventor: Wei-Yu Lin , Kuo-Yu Yeh
- Applicant: Powerchip Semiconductor Manufacturing Corporation
- Applicant Address: TW Hsinchu
- Assignee: POWERCHIP SEMICONDUCTOR MANUFACTURING CORPORATION
- Current Assignee: POWERCHIP SEMICONDUCTOR MANUFACTURING CORPORATION
- Current Assignee Address: TW Hsinchu
- Agency: LANWAY IPR SERVICES
- Agent Chun-Ming Shih
- Priority: TW 0102113 2021.01.20
- Main IPC: H01G2/06
- IPC: H01G2/06 ; H01G4/30 ; H01G4/38 ; H01G4/33 ; H01G4/232

Abstract:
A capacitor integrated structure, a capacitor unit and a manufacturing process thereof are provided. The manufacturing process of capacitor units includes the steps of: forming a plurality of capacitor stacking structures on a substrate having an insulation layer thereon; performing a first cut on insulation dividers provided between the adjacent capacitor stacking structures to form a plurality of recesses that expose first conductive portion and second conductive portion of each of the capacitor stacking structures; filling a metallic material in the recesses to form a plurality of metallic dividers that are electrically connected to the first conductive portion and the second conductive portion of each of the capacitor stacking structures; performing a second cut on the metallic dividers to form a plurality of independent capacitor units; and forming metallic walls on two opposite sides of each of the capacitor units, so as to provide a capacitor unit having two end electrodes.
Public/Granted literature
- US20220230806A1 MULTI-LAYER CAPACITOR UNIT AND MANUFACTURING PROCESS THEREOF Public/Granted day:2022-07-21
Information query